This project brings together promising yet established SMEs (Codeplay, Geomerics, AiGD, and ThinkS) and leading academic institutions (TU Berlin and Uppsala). The result is a unique consortium that has a balance of experience from academia in terms of the research, theory, and analysis — as well as industry expertise in terms of applications in practice, reaching production maturity and commercialization of the technology.
The consortium also consult with a separate advisory board.
TU Berlin looks back at a long and distinguished tradition of teaching and research. In 1799 its most important predecessor, the Building Academy, was founded. In 1946 the university was re-established under the name of Technische Universität Berlin. The seven Faculties of the university offer 50 courses of study from the fields of engineering and natural sciences, economics and business, planning sciences, humanities and the social sciences. Enrollment at TU Berlin is about 27,000 and the students are instructed by about 300 professors and an academic staff of 1,972, making it one of the largest technical universities in Germany. TU Berlin has been involved in several hundred different projects funded by the European Commission. The main focus is on projects within the Research Frameworks of the EC, but several projects have been financed in other programmes such as TEMPUS, Alfa, INTAS, e-learning as well as call for tenders.
TU Berlin will participate in the project through the Embedded Systems Architectures (Architektur eingebetteter Systeme, AES) laboratory of the School of Electrical Engineering and Computer Science. The AES laboratory investigates and teaches the field of computer architecture, ranging from low-power embedded systems to massively parallel high-performance systems. Its current research focuses include multi-/many-core architectures and GPUs, development and optimization of highly scalable parallel applications, and (architecture support for) parallel programming models. More information on the AES laboratory is available at http://www.aes.tu-berlin.de/en.
TU Berlin contributes to many elements of the project. It will port (parts of) an H.264 decoder to low-power GPUs. Here we bring in our expertise on a frame-level parallel implementation on H.264 decoding. It will also develop a kernel fusion tool and contribute to the SIMD vs. MIMD evaluation. Finally, TU Berlin will lead much of the integration work.
Codeplay Software Limited was founded in 2002 to commercialize compiler technology, developed by the founders Andrew Richards and Jens-Uwe Dolinsky, with funding from Jez San (founder of Argonaut and Arc). Since then, Codeplay has produced compilers for a series of innovative heterogeneous processors for games systems (Ageia PhysX, PlayStation 3, Movidius and for Qualcomm.) The company works with semiconductor companies to develop compiler tools to enable software to be ported to their new processors. Also, Codeplay has been involved in working on specific games, using their Offload compiler technology as well as their expertise, to deliver both performance and new animation techniques. Several major video games using Codeplay’s Offload technology and expertise are due to be released during 2011. The business is profitable and has 12 full-time staff based in Edinburgh, UK and Uppsala, Sweden. Codeplay is a member of the Khronos group, participating in the specification of OpenCL from the start, a member of the Multicore Association, being involved in the MCAPI and MRAPI standards process, as well as having a series of academic collaborations including: sponsoring PhD students at Glasgow and Imperial, and being a member of the PEPPHER consortium.
Codeplay will lead Tools & Technologies while also working on some of the applications porting work and helping with implementation of simulators. Codeplay has worked on compilers for Qualcomm, Ageia, Movidius and several other major GPU/CPU companies in the area of video games and graphics. By being able to get complex software hitting high performance levels on graphics processors, and developing compilers to make the process easy, Codeplay is in a unique position of having delivered solutions for mass-market commercial products in technology areas (heterogeneous multi-core) that are usually seen as high-risk research. An example is our recent work for Eutechnyx, where they developed both a revolutionary new animation system for a major upcoming game, as well as helping hit high levels of performance on the different CPUs the game has to run on.
Think Silicon was founded in 2007 by a team of highly experienced IC engineers with the vision to provide highly configurable graphics IP semiconductor modules. Think Silicon Ltd specialises in designing and developing mobile computer graphics solutions for low-end and mid-end devices using DirectFB and the Khronos Group Standards: OpenVG, OpenWF.
The company provides highly configurable, low power IP semiconductor modules like Think2D, a high performance 2D bitmap Graphics Accelerator, capable of targeting multiple types of surfaces including YUV, seamlessly move and scale raster images, accelerate drawing of lines and filled boxes and perform alpha blending in all target modes which add graphical power to mobile and embedded systems. It comes complete with Linux DirectFB GFX Drivers. ThinkVG Graphics Accelerator is a low area/high performance Graphics Accelerator IP Core desgined to bring high performance rendering to low gate-count embedded and mobile devices. It is a balanced core that accelerates commonly used graphics functions including blitting, Scaling, Projective image rendering, blending, compressed texture mapping, while its floating-point Graphics Processor is fully programmable using C/C++.
Think Silicon is a member of the Khronos Group, contributing in the specification of OpenVG, a member of Spirit Consortium and a member of Hellenic Semiconductor Industry Association.
ThinkS will work together with Uppsala and TU Berlin in defining new power efficient GPU architectures. Its main task is to provide the necessary hardware IP modules that will be used i) for the hardware demonstrator and ii) to validate/improve the simulation platform that will be developed as part of the project. ThinkS has great experience in low-power ASIC implementations especially in the area of 2D/2.5D/VG Computer Graphics targeting low-end devices.
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Samsung R&D Institute UK based in Staines-upon-Thames near South West London is a division of Samsung Electronics (UK) Ltd. Samsung R&D Institute UK is responsible for driving the company’s involvement within the Khronos Group. Samsung sits on Khronos’ board as a Promoter member, and our engineers actively participate in multiple working groups, particularly focussed on standardisation in the graphic-OS integration domain and shaping future graphics APIs. Since January 2014, we have taken on the role of chairing the EGL working group, and subsequently also chairing Khronos’ Technical Advisory Panel, which discusses new standardisation ideas and cross-working group topics. Samsung was also instrumental in forming the Window System Integration sub-group for the Vulkan API, which we now chair.