LPGPU Workshop on Power-Efficient GPU and Many-core Computing (PEGPUM 2016) In conjunction with the HiPEAC 2016 Conference
Wednesday (afternoon), January 20, 2016, Prague, Czech Republic


14:30 – 15:00

Title: Leveraging ASIP technology to accelerate GPU and many-core development

Presenter: Neil Hand (Codasip)

Abstract: Recent advances in Application Specific Processor (ASIP) design technology have made it drastically simpler to build custom processors for any application, including the complete software development environment. While ASIP technology is not yet suitable for modeling complete massively parallel GPU-like designs, the same technology can be utilized to perform rapid architectural exploration for GPU and many-core systems (at the software and hardware level) and such a methodology will be presented in this talk.


15:00 – 15:20

Title: Introduction of the LPGPU2 Project

Presenter: Ben Juurlink (TU Berlin)

Abstract: Low-power GPUs can be found in domains ranging from wearable and mobile computing, to automotive systems. With this ubiquity has come a wider range of opportunities of applications exploiting low-power GPUs, placing ever increasing demands on the expected performance and power efficiency of the devices. These demands cannot be met through hardware improvements alone, but the software must fully exploit the available resources. Unfortunately, application developers are seriously hindered when creating low-power GPU software by the limited quality of current performance analysis tools. LPGPU2 proposes to aid the application developer in creating software for low-power GPUs by providing a complete performance and power analysis process for the programmer. The LPGPU2 Project builds upon the experiences gained in the successful LPGPU project.

15:20 – 15:40

Title: SYCL-based computer vision library.

Presenter: Dr. Mehdi Goli (Codeplay)

Abstract: “Performance optimisation issues for computer vision on heterogeneous and embedded architectures can be categorised into system-level and kernel-level optimisations. In existing computer vision libraries, it can be difficult to support programmability of user-defined kernels across platforms. In such cases, it is the users’ responsibility to write an optimised kernel for different architectures, which is not a trivial task.

Providing an abstract model that allows programmers to develop vision applications independently from the underlying architecture can be a viable approach to separating the user-level application definition from the model implementation for different platforms. In this presentation, we propose a high-level computer vision framework that generates a compile-time expression tree-based model to address system-level optimisation. This approach enables running the same applications on different platforms with no modification to the source code.

15:40 – 16:00

Title: A Holistic Approach to Achieve MilliWatt Graphics Operations

Presenters: Iakovos Stamoulis and Georgios Keramidas (Think Silicon S.A.)

Dealing with the levels of power consumption required by wearables and Internet of Things (IoT) devices represents a major technological challenge that demands novel multi-disciplinary approaches spanning circuit, architecture, compiler, and API level optimization techniques. The main challenge in these new devices is the battery life and how to extend it to more than one day without having to search for wall plugs and charging stations. Thus, ultra-low power devices performing energy-conscious graphics calculations are desperately needed in the market. This presentation will focus on the co-design SW-HW technology developed by Think Silicon, realized in the current products of the company (Nema|t and Nema|p; the world smallest 2D/3D GPUs in the market), targeting to set forward a set of low power techniques working in a synergistic fashion.

16:00 – 16:30 Coffee Break

16:30 – 17:00

Title: HERCULES – High-Performance Real-time Architectures for Low-Power Embedded Systems

Presenter: Paolo Burgio (HiPeRT – Università di Modena e Reggio Emilia, Italy)

Abstract: Many-core architectures are the key building block of next-generation embedded systems, where performance per Watt will be the primary concern. Heterogeneous platforms coupling a GPU and a multi-core host provide an impressive computing power within a reduced power cap, but they are not yet ready to be adopted in safety-critical domains such as advanced driving assistance systems (ADAS) and avionics applications, that require a prompt interaction with the surrounding environment. The Hercules project will develop an integrated framework to obtain predictable performance on top of cutting-edge heterogeneous COTS many-core platforms, with the final goal of obtaining an order-of-magnitude improvement in the cost and power consumption of next generation real-time applications.

17:00 – 17:20

Title: Augmented and Virtual Reality on mobile devices: challenges and opportunities

Presenter: Prashant Sharma (Samsung UK)

Abstract: The growth of mobile computing presents tremendous opportunities for augmented and virtual reality applications. With today’s high resolution displays it’s still a challenge to effectively process camera frames and render scene for two eyes, which are required for augmented and virtual reality respectively. This talk presents limitations and challenges of these applications with current APIs and how to mitigate some of them.

Organisers and their affiliations

  • Jan Lucas and Ben Juurlink, TU Berlin
  • Georgios Keramidas, Think Silicon Ltd.
  • Paul Keir, University of the West of Scotland
  • Alastair Murray, Codeplay Software Ltd.


Jan Lucas

Technische Universität Berlin
Embedded Systems Architecture Group (AES)
Department of Electrical Engineering and Computer Science
Building E-N / Office: E-N 601
Einsteinufer 17, 10587 Berlin

Tel: +49.30.314-22288
Fax: +49.30.314-22943
email: j.lucas (AT)

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