Title: Fix the code. Don’t tweak the hardware: A new compiler approach to Voltage-Frequency scaling

About the conference:

2014 International symposium on code generation and optimization provides a premier venue to bring together researchers and practitioners working at the interface of hardware and software on a wide range of optimization and code generation techniques and related issues. The conferences spans the spectrum from purely static to fully dynamic approaches, including techniques ranging from pure software-based methods to architectural features and support.

Abstract: Traditional compiler approaches to optimize power efficiency aim to adjust voltage and frequency at runtime to match the code characteristics to the hardware (e.g., memory-bound vs. compute-bound to low frequency and high frequency). However, such approaches are constrained by three factors: i) voltage-frequency transitions are too slow to apply at a very fine scale, ii) larger code regions are seldom unequivocally memory- or compute-bound, and, iii) the usable voltage range for future technologies is rapidly shrinking. These factors necessitate new approaches to address power-efficiency at the code-generation level. This pa per proposes one such approach to automatically generate power-efficient code for a decoupled access/execute model in which a program is separated into coarse-grained phases
focused on data prefetch (access) and computation (execute). This generates sufficiently large regions of distinctly memory- and compute-bound code to enable effective Dynamic Voltage Frequency Scaling (DVFS). ….